1. Field of the Invention
The present invention relates to a conversion device, particularly to a digital-to-analog conversion device.
2. Description of the Related Art
With great advance of digital technology and extensive application of integrated circuit, digitalization has been a normal measure to process signals, wherein analog signals—the dominant signals in the nature—are sampled to form digital signals. The digital signals are analyzed, compressed and transmitted, whereby the advantages thereof can be fully utilized. Then, the digital signals are decompressed and reduced into the original analog signals in the receiving end. The digital signals will have slight distortion in the transmission process. However, the distortion is within a tolerable range. The advantage of digitalization is much greater than the trivial disadvantage thereof. Therefore, signal digitalization has been widely applied to various fields, such mobile phones, digital cameras, web phones, voice recognition systems, fingerprint recognition systems, sport apparatus controllers, etc. Undoubtedly, a digital world has descended on us. Hence, DAC (digital-to-analog converter) has become a frequently-used component in various digital products.
Among high-speed and high-resolution DAC design, the current-steering DAC has the optimized architecture because it can directly drive a resistor of tens of ohms without using any extra amplifier. Among the current-steering DACs, the binary-weighted type has the most direct and simplest implementation. However, the binary-weighted DAC has a very big problem: when digital input varies, the output end would have a transient glitch. Especially in a major code transition from 0111 . . . 11 to 1000 . . . 00, the analog output would have a very big surge, which will damage the monotonicity of DAC, as shown in FIG. 1. The glitch results from the mismatched bits in the path from input to output. A thermometer-code DAC can effectively reduce transient glitch. However, the thermometer-code DAC further needs a binary-to-unary decoder. When applied to the case having a great member of bits, the binary-to-unary decoder has disadvantages of large area, low speed, and high average power consumption. Therefore, the binary-to-unary decoder is unsuitable for high-speed and high-resolution DACs. Thus, many DAC designs adopt a segmented architecture to integrate the advantages of the binary-weighted DAC and the thermometer-code DAC, wherein the case of MSB (Most Significant Bit) adopts the thermometer-code architecture and the case of LSB (Least Significant Bit) adopts the binary-weighted architecture. However, the segmented architecture still has non-monotonicity in the LSB part. Further, the segmented architecture needs additional delay circuits to synchronize MSB signals and LSB signals.
Accordingly, the present invention proposes a digital-to-analog conversion device to overcome the abovementioned problems.